1. Field of the Invention
The present invention relates to a level shifter circuit capable of preventing malfunctions from occurring due to sudden voltage fluctuations while being stably operated even when a range of an operating voltage has a negative potential, and a gate driver circuit including the same.
2. Description of the Related Art
A level shifter circuit is a circuit shifting an on/off signal that is a control signal having a low voltage level to have a high or low voltage level in a high side gate driver circuit. In order to drive a switching device such as a high side insulated gate bipolar transistor (IGBT) or a metal-oxide-semiconductor field-effect transistor (MOSFET), a relatively inexpensive pulse transformer having a simple structure has mainly been used in the related art. However, the pulse transformer has a low operating speed and thus, a level shifter circuit has mainly been used for a high side gate driver circuit. Generally, the level shifter circuit includes a common source of which the load resistor is connected to an output terminal of the switching device (generally, a transistor).
A general level shifter circuit used for the high side gate driver circuit receives a pulse signal having different phases as an input signal and shifts a level of the received pulse signal to generate an output signal. The output signal is applied to an input terminal of an inverter of the high side gate driver circuit. In this case, malfunctions may occur in the high side gate driver circuit when the level of the output signal is only changed to a ground level, in the case in which a level of the output signal applied to the input terminal of the inverter drops to have a negative (−) potential from a potential of a reference voltage of the high side gate driver circuit.
In the following related art documents, Patent Document 1 relates to a level shifter circuit applied to a high side gate driver circuit and discloses contents in which a VIV shifter changes a level range of a signal applied to an input terminal of an inverter of a high side gate driver circuit, but does not disclose a level shifter circuit having a simple structure using a current mirror circuit as in the present invention. In addition, Patent Document 2 discloses contents in which a malfunction due to a sudden fluctuation in voltage (dv/dt) is prevented, but does not disclose contents in which a malfunction occurring when a reference voltage of a high side gate driver circuit drops to have a negative (−) potential is prevented.